stm32 /stm32h5 /STM32H523 /RCC /RCC_APB2LPENR

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Interpret as RCC_APB2LPENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TIM1LPEN 0 (B_0x0)SPI1LPEN 0 (B_0x0)TIM8LPEN 0 (B_0x0)USART1LPEN 0 (B_0x0)TIM15LPEN 0 (B_0x0)SPI4LPEN 0 (B_0x0)SPI6LPEN 0 (B_0x0)SAI1LPEN 0 (B_0x0)SAI2LPEN 0 (B_0x0)USBLPEN

SPI1LPEN=B_0x0, SPI6LPEN=B_0x0, TIM1LPEN=B_0x0, TIM15LPEN=B_0x0, SPI4LPEN=B_0x0, SAI1LPEN=B_0x0, SAI2LPEN=B_0x0, USART1LPEN=B_0x0, USBLPEN=B_0x0, TIM8LPEN=B_0x0

Description

RCC APB2 sleep clock register

Fields

TIM1LPEN

TIM1 clock enable during Sleep mode

0 (B_0x0): TIM1 peripheral clock disabled during Sleep mode

1 (B_0x1): TIM1 peripheral clock enabled during Sleep mode (default after reset)

SPI1LPEN

SPI1 clock enable during Sleep mode

0 (B_0x0): SPI1 peripheral clock disabled during Sleep mode

1 (B_0x1): SPI1 peripheral clock enabled during Sleep mode (default after reset)

TIM8LPEN

TIM8 clock enable during Sleep mode

0 (B_0x0): TIM8 peripheral clock disabled during Sleep mode

1 (B_0x1): TIM8 peripheral clock enabled during Sleep mode (default after reset)

USART1LPEN

USART1 clock enable during Sleep mode

0 (B_0x0): USART1 peripheral clock disabled during Sleep mode

1 (B_0x1): USART1 peripheral clock enabled during Sleep mode (default after reset)

TIM15LPEN

TIM15 clock enable during Sleep mode

0 (B_0x0): TIM15 peripheral clock disabled during Sleep mode

1 (B_0x1): TIM15 peripheral clock enabled during Sleep mode (default after reset)

SPI4LPEN

SPI4 clock enable during Sleep mode

0 (B_0x0): SPI4 peripheral clock disabled during Sleep mode

1 (B_0x1): SPI4 peripheral clock enabled during Sleep mode (default after reset)

SPI6LPEN

SPI6 clock enable during Sleep mode

0 (B_0x0): SPI6 peripheral clock disabled during Sleep mode

1 (B_0x1): SPI6 peripheral clock enabled during Sleep mode (default after reset)

SAI1LPEN

SAI1 clock enable during Sleep mode

0 (B_0x0): SAI1 peripheral clock disabled during Sleep mode

1 (B_0x1): SAI1 peripheral clock enabled during Sleep mode (default after reset)

SAI2LPEN

SAI2 clock enable during Sleep mode

0 (B_0x0): SAI2 peripheral clock disabled during Sleep mode

1 (B_0x1): SAI2 peripheral clock enabled during Sleep mode (default after reset)

USBLPEN

USB clock enable during Sleep mode

0 (B_0x0): USB peripheral clock disabled during Sleep mode

1 (B_0x1): USB peripheral clock enabled during Sleep mode (default after reset)

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