LPTIM1EN=B_0x0, RTCAPBEN=B_0x0, LPTIM3EN=B_0x0, LPTIM4EN=B_0x0, VREFBUFEN=B_0x0, I3C2EN=B_0x0, LPTIM5EN=B_0x0, LPTIM6EN=B_0x0, I2C3EN=B_0x0, LPUART1EN=B_0x0, SBSEN=B_0x0
RCC APB3 peripheral clock register
| SBSEN | SBS clock enable 0 (B_0x0): SBS peripheral clock disabled (default after reset) 1 (B_0x1): SBS peripheral clock enabled |
| LPUART1EN | LPUART1 clock enable 0 (B_0x0): LPUART1 peripheral clock disabled (default after reset) 1 (B_0x1): LPUART1 peripheral clock enabled |
| I2C3EN | I2C3 clock enable 0 (B_0x0): I2C3 peripheral clock disabled (default after reset) 1 (B_0x1): I2C3 peripheral clock enabled |
| I3C2EN | I3C2 clock enable 0 (B_0x0): I3C2 peripheral clock disabled (default after reset) 1 (B_0x1): I3C2 peripheral clock enabled |
| LPTIM1EN | LPTIM1 clock enable 0 (B_0x0): LPTIM1 peripheral clock disabled (default after reset) 1 (B_0x1): LPTIM1 peripheral clock enabled |
| LPTIM3EN | LPTIM3 clock enable 0 (B_0x0): LPTIM3 peripheral clock disabled (default after reset) 1 (B_0x1): LPTIM3 peripheral clock enabled |
| LPTIM4EN | LPTIM4 clock enable 0 (B_0x0): LPTIM4 peripheral clock disabled (default after reset) 1 (B_0x1): LPTIM4 peripheral clock enabled |
| LPTIM5EN | LPTIM5 clock enable 0 (B_0x0): LPTIM5 peripheral clock disabled (default after reset) 1 (B_0x1): LPTIM5 peripheral clock enabled |
| LPTIM6EN | LPTIM6 clock enable 0 (B_0x0): LPTIM6 peripheral clock disabled (default after reset) 1 (B_0x1): LPTIM6 peripheral clock enabled |
| VREFBUFEN | VREFBUF clock enable 0 (B_0x0): VREFBUF peripheral clock disabled (default after reset) 1 (B_0x1): VREFBUF peripheral clock enabled |
| RTCAPBEN | RTC APB interface clock enable 0 (B_0x0): RTC APB interface clock disabled (default after reset) 1 (B_0x1): RTC APB interface clock enabled |