stm32 /stm32h5 /STM32H523 /RCC /RCC_CCIPR3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_CCIPR3

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SPI1SEL 0 (B_0x0)SPI2SEL 0 (B_0x0)SPI3SEL 0 (B_0x0)SPI4SEL 0 (B_0x0)SPI6SEL 0 (B_0x0)LPUART1SEL

SPI2SEL=B_0x0, SPI6SEL=B_0x0, LPUART1SEL=B_0x0, SPI1SEL=B_0x0, SPI3SEL=B_0x0, SPI4SEL=B_0x0

Description

RCC kernel clock configuration register

Fields

SPI1SEL

SPI1 kernel clock source selection

0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset)

1 (B_0x1): pll2_p_ck selected as kernel clock

2 (B_0x2): pll3_p_ck selected as kernel clock

3 (B_0x3): AUDIOCLK selected as kernel clock

4 (B_0x4): per_ck selected as kernel clock

SPI2SEL

SPI2 kernel clock source selection

0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset)

1 (B_0x1): pll2_p_ck selected as kernel clock

2 (B_0x2): pll3_p_ck selected as kernel clock

3 (B_0x3): AUDIOCLK selected as kernel clock

4 (B_0x4): per_ck selected as kernel clock

SPI3SEL

SPI3 kernel clock source selection

0 (B_0x0): pll1_q_ck selected as kernel clock (default after reset)

1 (B_0x1): pll2_p_ck selected as kernel clock

2 (B_0x2): pll3_p_ck selected as kernel clock

3 (B_0x3): AUDIOCLK selected as kernel clock

4 (B_0x4): per_ck selected as kernel clock

SPI4SEL

SPI4 kernel clock source selection

0 (B_0x0): rcc_pclk2 selected as kernel clock (default after reset)

1 (B_0x1): pll2_q_ck selected as kernel clock

2 (B_0x2): pll3_q_ck selected as kernel clock

3 (B_0x3): hsi_ker_ck selected as kernel clock

4 (B_0x4): csi_ker_ck selected as kernel clock

5 (B_0x5): hse_ck selected as kernel clock

SPI6SEL

SPI6 kernel clock source selection

0 (B_0x0): rcc_pclk2 selected as kernel clock (default after reset)

1 (B_0x1): pll2_q_ck selected as kernel clock

2 (B_0x2): pll3_q_ck selected as kernel clock

3 (B_0x3): hsi_ker_ck selected as kernel clock

4 (B_0x4): csi_ker_ck selected as kernel clock

5 (B_0x5): hse_ck selected as kernel clock

LPUART1SEL

LPUART1 kernel clock source selection

0 (B_0x0): rcc_pclk3 s elected as kernel clock (default after reset)

1 (B_0x1): pll2_q_ck selected as kernel clock

2 (B_0x2): pll3_q_ck selected as kernel clock

3 (B_0x3): hsi_ker_ck selected as kernel clock

4 (B_0x4): csi_ker_ck selected as kernel clock

5 (B_0x5): lse_ck selected as kernel clock

Links

()