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stm32 /stm32h5 /STM32H523 /RCC /RCC_HSICFGR

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Interpret as RCC_HSICFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HSICAL0HSITRIM

Description

RCC HSI calibration register

Fields

HSICAL

HSI clock calibration
HSITRIM

HSI clock trimming

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32