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stm32 /stm32h5 /STM32H523 /SBS /SBS_ECCNMIR

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Interpret as SBS_ECCNMIR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)ECCNMI_MASK_EN

ECCNMI_MASK_EN=B_0x0

Description

SBS flift ECC NMI mask register

Fields

ECCNMI_MASK_EN

NMI behavior setup when a double ECC error occurs on flitf data part

0 (B_0x0): NMI generated if a double ECC error in the flitf data part

1 (B_0x1): NMI not generated if a double ECC error in the flitf data part

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32