EOBIE=B_0x0, TXFNFIE=B_0x0, WAKE=B_0x0, RXFNEIE=B_0x0, IDLEIE=B_0x0, CMIE=B_0x0, TE=B_0x0, TXFEIE=B_0x0, UESM=B_0x0, RE=B_0x0, TCIE=B_0x0, FIFOEN=B_0x0, PCE=B_0x0, PEIE=B_0x0, RXFFIE=B_0x0, PS=B_0x0, RTOIE=B_0x0, OVER8=B_0x0, UE=B_0x0, MME=B_0x0
USART control register 1
| UE | USART enable 0 (B_0x0): USART prescaler and outputs disabled, low-power mode 1 (B_0x1): USART enabled |
| UESM | USART enable in low-power mode 0 (B_0x0): USART not able to wake up the MCU from low-power mode. 1 (B_0x1): USART able to wake up the MCU from low-power mode. |
| RE | Receiver enable 0 (B_0x0): Receiver is disabled 1 (B_0x1): Receiver is enabled and begins searching for a start bit |
| TE | Transmitter enable 0 (B_0x0): Transmitter is disabled 1 (B_0x1): Transmitter is enabled |
| IDLEIE | IDLE interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated whenever IDLE = 1 in the USART_ISR register |
| RXFNEIE | RXFIFO not empty interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated whenever ORE=1 or RXFNE=1 in the USART_ISR register |
| TCIE | Transmission complete interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated whenever TC=1 in the USART_ISR register |
| TXFNFIE | TXFIFO not full interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated whenever TXFNF =1 in the USART_ISR register |
| PEIE | PE interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated whenever PE=1 in the USART_ISR register |
| PS | Parity selection 0 (B_0x0): Even parity 1 (B_0x1): Odd parity |
| PCE | Parity control enable 0 (B_0x0): Parity control disabled 1 (B_0x1): Parity control enabled |
| WAKE | Receiver wake-up method 0 (B_0x0): Idle line 1 (B_0x1): Address mark |
| M0 | Word length |
| MME | Mute mode enable 0 (B_0x0): Receiver in active mode permanently 1 (B_0x1): Receiver can switch between mute mode and active mode. |
| CMIE | Character match interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated when the CMF bit is set in the USART_ISR register. |
| OVER8 | Oversampling mode 0 (B_0x0): Oversampling by 16 1 (B_0x1): Oversampling by 8 |
| DEDT | Driver Enable deassertion time |
| DEAT | Driver Enable assertion time |
| RTOIE | Receiver timeout interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated when the RTOF bit is set in the USART_ISR register. |
| EOBIE | End of block interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated when the EOBF flag is set in the USART_ISR register |
| M1 | Word length |
| FIFOEN | FIFO mode enable 0 (B_0x0): FIFO mode is disabled. 1 (B_0x1): FIFO mode is enabled. |
| TXFEIE | TXFIFO empty interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated when TXFE=1 in the USART_ISR register |
| RXFFIE | RXFIFO Full interrupt enable 0 (B_0x0): Interrupt inhibited 1 (B_0x1): USART interrupt generated when RXFF=1 in the USART_ISR register |