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stm32 /stm32h5 /STM32H533 /AES /AES_SR

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Interpret as AES_SR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)RDERRF 0 (B_0x0)WRERRF 0 (B_0x0)BUSY 0 (B_0x0)KEYVALID

RDERRF=B_0x0, WRERRF=B_0x0, BUSY=B_0x0, KEYVALID=B_0x0

Description

AES status register

Fields

RDERRF

Read error flag

0 (B_0x0): No error

1 (B_0x1): Unexpected read to AES_DOUTR register occurred during computation or data input phase.
WRERRF

Write error flag

0 (B_0x0): No error

1 (B_0x1): Unexpected write to AES_DINR register occurred during computation or data output phase.
BUSY

Busy

0 (B_0x0): Idle

1 (B_0x1): Busy
KEYVALID

Key valid flag

0 (B_0x0): Key not valid

1 (B_0x1): Key valid

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32