stm32 /stm32h5 /STM32H533 /DTS /DTS_CFGR1

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Interpret as DTS_CFGR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TS1_EN 0 (B_0x0)TS1_START 0TS1_INTRIG_SEL 0TS1_SMP_TIME 0 (B_0x0)REFCLK_SEL 0 (B_0x0)Q_MEAS_OPT 0 (B_0x0)HSREF_CLK_DIV

REFCLK_SEL=B_0x0, TS1_EN=B_0x0, HSREF_CLK_DIV=B_0x0, Q_MEAS_OPT=B_0x0, TS1_START=B_0x0

Description

Temperature sensor configuration register 1

Fields

TS1_EN

Temperature sensor 1 enable bit

0 (B_0x0): Temperature sensor 1 disabled

1 (B_0x1): Temperature sensor 1 enabled

TS1_START

Start frequency measurement on temperature sensor 1

0 (B_0x0): No software trigger.

1 (B_0x1): Software trigger for a frequency measurement.

TS1_INTRIG_SEL

Input trigger selection bit for temperature sensor 1

TS1_SMP_TIME

Sampling time for temperature sensor 1

REFCLK_SEL

Reference clock selection bit

0 (B_0x0): High speed reference clock (PCLK)

1 (B_0x1): Low speed reference clock (LSE)

Q_MEAS_OPT

Quick measurement option bit

0 (B_0x0): Measurement with calibration

1 (B_0x1): Measurement without calibration

HSREF_CLK_DIV

High speed clock division ratio

0 (B_0x0): No divider

1 (B_0x1): No divider

2 (B_0x2): 1/2 division ratio

127 (B_0x7F): 1/127 division ratio

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