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stm32 /stm32h5 /STM32H533 /GPDMA /GPDMA_SECCFGR

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Interpret as GPDMA_SECCFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SEC0 0 (B_0x0)SEC1 0 (B_0x0)SEC2 0 (B_0x0)SEC3 0 (B_0x0)SEC4 0 (B_0x0)SEC5 0 (B_0x0)SEC6 0 (B_0x0)SEC7

SEC6=B_0x0, SEC2=B_0x0, SEC0=B_0x0, SEC1=B_0x0, SEC5=B_0x0, SEC7=B_0x0, SEC3=B_0x0, SEC4=B_0x0

Description

GPDMA secure configuration register

Fields

SEC0

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure
SEC1

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure
SEC2

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure
SEC3

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure
SEC4

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure
SEC5

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure
SEC6

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure
SEC7

secure state of channel x

0 (B_0x0): nonsecure

1 (B_0x1): secure

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32