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stm32 /stm32h5 /STM32H533 /TIM12 /TIM12_DIER

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Interpret as TIM12_DIER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)UIE 0 (B_0x0)CC1IE 0 (B_0x0)CC2IE 0 (B_0x0)TIE

CC1IE=B_0x0, CC2IE=B_0x0, TIE=B_0x0, UIE=B_0x0

Description

TIM12 DMA/Interrupt enable register

Fields

UIE

Update interrupt enable

0 (B_0x0): Update interrupt disabled.

1 (B_0x1): Update interrupt enabled.
CC1IE

Capture/Compare 1 interrupt enable

0 (B_0x0): CC1 interrupt disabled.

1 (B_0x1): CC1 interrupt enabled.
CC2IE

Capture/Compare 2 interrupt enable

0 (B_0x0): CC2 interrupt disabled.

1 (B_0x1): CC2 interrupt enabled.
TIE

Trigger interrupt enable

0 (B_0x0): Trigger interrupt disabled.

1 (B_0x1): Trigger interrupt enabled.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32