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stm32 /stm32h5 /STM32H562 /DCMI /DCMI_ICR

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Interpret as DCMI_ICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FRAME_ISC)FRAME_ISC 0 (OVR_ISC)OVR_ISC 0 (ERR_ISC)ERR_ISC 0 (VSYNC_ISC)VSYNC_ISC 0 (LINE_ISC)LINE_ISC

Description

DCMI interrupt clear register

Fields

FRAME_ISC

Capture complete interrupt status clear Setting this bit clears the FRAME_RIS flag in the DCMI_RIS register.
OVR_ISC

Overrun interrupt status clear Setting this bit clears the OVR_RIS flag in the DCMI_RIS register.
ERR_ISC

Synchronization error interrupt status clear Setting this bit clears the ERR_RIS flag in the DCMI_RIS register. Note: This bit is available only in embedded synchronization mode.
VSYNC_ISC

Vertical Synchronization interrupt status clear Setting this bit clears the VSYNC_RIS flag in the DCMI_RIS register.
LINE_ISC

line interrupt status clear Setting this bit clears the LINE_RIS flag in the DCMI_RIS register.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32