PWR_WUSR

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Interpret as PWR_WUSR

WUF2=B_0x0, WUF8=B_0x0, WUF3=B_0x0, WUF5=B_0x0, WUF6=B_0x0, WUF4=B_0x0, WUF7=B_0x0, WUF1=B_0x0

Description

PWR wakeup status register

Fields

WUF1	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.
WUF2	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.
WUF3	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.
WUF4	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.
WUF5	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.
WUF6	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.
WUF7	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.
WUF8	wakeup pin WUFx flag This bit is set by hardware and cleared only by a RESET pin or by setting the CWUFx bit in PWR_WUSCR register. 0 (B_0x0): no wakeup event occurred. 1 (B_0x1): a wakeup event received from WUFx pin.

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