stm32 /stm32h5 /STM32H563 /ETH /ETH_MACQTXFCR

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Interpret as ETH_MACQTXFCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FCB_BPA)FCB_BPA 0 (TFE)TFE 0 (B_0x0)PLT0 (DZPQ)DZPQ 0PT

PLT=B_0x0

Description

Tx Queue flow control register

Fields

FCB_BPA

Flow Control Busy or Backpressure Activate This bit initiates a Pause packet in the Full-duplex mode and activates the backpressure function in the Half-duplex mode if the TFE bit is set. Full-Duplex mode: this bit should be read as 0 before writing to this register. To initiate a Pause packet, the application must set this bit to 1. During Control packet transfer, this bit continues to be set to indicate that a packet transmission is in progress. When Pause packet transmission is complete, the MAC resets this bit to 0. You should not write to this register until this bit is cleared. Half-duplex mode: When this bit is set (and TFE bit is set) in the Half-duplex mode, the MAC asserts the backpressure. During backpressure, when the MAC receives a new packet, the transmitter starts sending a JAM pattern resulting in a collision. When the MAC is configured for the Full-duplex mode, the BPA is automatically disabled.

TFE

Transmit Flow Control Enable Full-duplex mode: when this bit is set, the MAC enables the flow control operation to Tx Pause packets. When this bit is reset, the flow control operation in the MAC is disabled, and the MAC does not transmit any Pause packets. Half-duplex mode: when this bit is set, the MAC enables the backpressure operation. When this bit is reset, the backpressure feature is disabled.

PLT

Pause Low Threshold This field configures the threshold of the Pause timer at which the input flow is checked for automatic retransmission of the Pause packet. The threshold values should be always less than the Pause Time configured in Bits[31:16]. For example, if PT = 100H (256 slot times), and PLT = 001, a second Pause packet is automatically transmitted at 228 (256-28) slot times after the first Pause packet is transmitted. The following list provides the threshold values for different values: 110 to 111: Reserved, must not be used The slot time is defined as the time taken to transmit 512 bits (64 bytes) on the MII interface. This (approximate) computation is based on the packet size (64, 1518, 2000, 9018, 16384, or 32768) + 2 Pause Packet Size + IPG in Slot Times.

0 (B_0x0): Pause Time minus 4 Slot Times (PT -4 slot times)

1 (B_0x1): Pause Time minus 28 Slot Times (PT -28 slot times)

2 (B_0x2): Pause Time minus 36 Slot Times (PT -36 slot times)

3 (B_0x3): Pause Time minus 144 Slot Times (PT -144 slot times)

4 (B_0x4): Pause Time minus 256 Slot Times (PT -256 slot times)

5 (B_0x5): Pause Time minus 512 Slot Times (PT -512 slot times)

DZPQ

Disable Zero-Quanta Pause When this bit is set, it disables the automatic generation of the zero-quanta Pause packets. When this bit is reset, normal operation with automatic zero-quanta Pause packet generation is enabled.

PT

Pause Time This field holds the value to be used in the Pause Time field in the Tx control packet. I

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