SPLCK4=B_0x0, SPLCK25=B_0x0, SPLCK16=B_0x0, SPLCK30=B_0x0, SPLCK17=B_0x0, SPLCK13=B_0x0, SPLCK6=B_0x0, SPLCK26=B_0x0, SPLCK29=B_0x0, SPLCK2=B_0x0, SPLCK23=B_0x0, SPLCK28=B_0x0, SPLCK7=B_0x0, SPLCK24=B_0x0, SPLCK19=B_0x0, SPLCK21=B_0x0, SPLCK14=B_0x0, SPLCK8=B_0x0, SPLCK12=B_0x0, SPLCK11=B_0x0, SPLCK15=B_0x0, SPLCK5=B_0x0, SPLCK20=B_0x0, SPLCK0=B_0x0, SPLCK31=B_0x0, SPLCK27=B_0x0, SPLCK18=B_0x0, SPLCK22=B_0x0, SPLCK9=B_0x0, SPLCK10=B_0x0, SPLCK3=B_0x0, SPLCK1=B_0x0
GTZC1 SRAM3 MPCBB configuration lock register 1
| SPLCK0 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK1 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK2 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK3 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK4 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK5 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK6 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK7 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK8 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK9 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK10 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK11 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK12 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK13 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK14 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK15 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK16 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK17 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK18 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK19 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK20 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK21 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK22 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK23 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK24 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK25 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK26 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK27 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK28 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK29 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK30 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |
| SPLCK31 | Security/privilege configuration lock for super-block This bit is set by software and can be cleared only by system reset. 0 (B_0x0): GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy can be written. 1 (B_0x1): Writes to GTZC1_MPCBBz_SECCFGRy and GTZC1_MPCBBz_PRIVCFGRy are ignored |