OCTOSPI1EN=B_0x0, FMCEN=B_0x0, SDMMC2EN=B_0x0, SDMMC1EN=B_0x0
RCC AHB4 peripheral clock register
| SDMMC1EN | SDMMC1 and SDMMC1 delay peripheral clock enable reset 0 (B_0x0): SDMMC1 and SDMMC1 delay peripherals clock disabled (default after reset) 1 (B_0x1): SDMMC1 and SDMMC1 delay peripherals clock enabled |
| SDMMC2EN | SDMMC2 and SDMMC2 delay peripheral clock enabled Set and reset by software. 0 (B_0x0): SDMMC2 and SDMMC2 delay peripherals clock disabled (default after reset) 1 (B_0x1): SDMMC2 and SDMMC2 delay peripherals clock enabled |
| FMCEN | FMC clock enable Set and reset by software. 0 (B_0x0): FMC peripheral clock disabled (default after reset) 1 (B_0x1): FMC peripheral clock enabled |
| OCTOSPI1EN | OCTOSPI1 clock enable Set and reset by software. 0 (B_0x0): OCTOSPI1 peripheral clock disabled (default after reset) 1 (B_0x1): OCTOSPI1 peripheral clock enabled |