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stm32 /stm32h5 /STM32H573 /ETH /ETH_MACPPSTTSR

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Interpret as ETH_MACPPSTTSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TSTRH0

Description

PPS target time seconds register

Fields

TSTRH0

PPS Target Time Seconds Register This field stores the time in seconds. When the timestamp value matches or exceeds both Target Timestamp registers, the MAC starts or stops the PPS signal output and generates an interrupt (if enabled) based on Target Time mode selected for the corresponding PPS output in the PPS control register (ETH_MACPPSCR).

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32