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stm32 /stm32h7 /STM32H723 /ADC1 /ADC_HTR1

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Interpret as ADC_HTR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HTR1

Description

ADC watchdog threshold register 1

Fields

HTR1

Analog watchdog 1 higher threshold These bits are written by software to define the higher threshold for the analog watchdog 1. Refer to AWD2CH, AWD3CH, AWD_HTRy, AWD_LTRy, AWDy) Note: The software is allowed to write these bits only when ADSTART=0 and JADSTART=0 (which ensures that no conversion is ongoing).

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32