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stm32 /stm32h7 /STM32H723 /RCC /AHB3RSTR

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Interpret as AHB3RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (MDMARST)MDMARST 0 (DMA2DRST)DMA2DRST 0 (FMCRST)FMCRST 0 (OCTOSPI1RST)OCTOSPI1RST 0 (SDMMC1RST)SDMMC1RST 0 (OCTOSPI2RST)OCTOSPI2RST 0 (IOMNGRRST)IOMNGRRST 0 (OTFD1RST)OTFD1RST 0 (OTFD2RST)OTFD2RST 0 (CPURST)CPURST

Description

RCC AHB3 Reset Register

Fields

MDMARST

MDMA block reset
DMA2DRST

DMA2D block reset
FMCRST

FMC block reset
OCTOSPI1RST

QUADSPI and QUADSPI delay block reset
SDMMC1RST

SDMMC1 and SDMMC1 delay block reset
OCTOSPI2RST

OCTOSPI2 and OCTOSPI2 delay block reset Set and reset by software
IOMNGRRST

OCTOSPIM reset Set and reset by software
OTFD1RST

OTFD1 reset Set and reset by software Take care that resetting the OTFD means loosing the decryption key loaded during secure boot.
OTFD2RST

OTFD2 reset Set and reset by software Take care that resetting the OTFD means loosing the decryption key loaded during secure boot.
CPURST

CPU reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32