stm32 /stm32h7 /STM32H750 /ETH /ETH_MMC_TX_INTERRUPT_MASK

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Interpret as ETH_MMC_TX_INTERRUPT_MASK

Description

MMC Tx interrupt mask register

Fields

TXSCOLGPIM	MMC Transmit Single Collision Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the (ETH_TX_SINGLE_COLLISION_GOOD_PACKETS) counter reaches half of the maximum value or the maximum value.
TXMCOLGPIM	MMC Transmit Multiple Collision Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the (ETH_TX_MULTIPLE_COLLISION_GOOD_PACKETS) counter reaches half of the maximum value or the maximum value.
TXGPKTIM	MMC Transmit Good Packet Counter Interrupt Mask Setting this bit masks the interrupt when the (ETH_TX_PACKET_COUNT_GOOD) counter reaches half of the maximum value or the maximum value.
TXLPIUSCIM	MMC Transmit LPI microsecond counter interrupt Mask Setting this bit masks the interrupt when the (ETH_TX_LPI_USEC_CNTR) counter reaches half of the maximum value or the maximum value.
TXLPITRCIM	MMC Transmit LPI transition counter interrupt Mask Setting this bit masks the interrupt when the (ETH_TX_LPI_TRAN_CNTR) counter reaches half of the maximum value or the maximum value.

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