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stm32 /stm32h7 /STM32H7A3 /PWR /PWR_WKUPCR

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Interpret as PWR_WKUPCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (WKUPC1)WKUPC1 0 (WKUPC2)WKUPC2 0 (WKUPC3)WKUPC3 0 (WKUPC4)WKUPC4 0 (WKUPC5)WKUPC5 0 (WKUPC6)WKUPC6

Description

reset only by system reset, not reset by wakeup from Standby mode5 wait states are required when writing this register (when clearing a WKUPF bit in PWR_WKUPFR, the AHB write access will complete after the WKUPF has been cleared).

Fields

WKUPC1

Clear Wakeup pin flag for WKUP. These bits are always read as 0.
WKUPC2

Clear Wakeup pin flag for WKUP. These bits are always read as 0.
WKUPC3

Clear Wakeup pin flag for WKUP. These bits are always read as 0.
WKUPC4

Clear Wakeup pin flag for WKUP. These bits are always read as 0.
WKUPC5

Clear Wakeup pin flag for WKUP. These bits are always read as 0.
WKUPC6

Clear Wakeup pin flag for WKUP. These bits are always read as 0.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32