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stm32 /stm32h7 /STM32H7A3 /RCC /RCC_AHB1RSTR

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Interpret as RCC_AHB1RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)DMA1RST 0 (B_0x0)DMA2RST 0 (B_0x0)ADC12RST 0 (B_0x0)CRCRST 0 (B_0x0)USB1OTGRST

DMA2RST=B_0x0, DMA1RST=B_0x0, USB1OTGRST=B_0x0, CRCRST=B_0x0, ADC12RST=B_0x0

Fields

DMA1RST

DMA1 and DMAMUX1 blocks reset Set and reset by software.

0 (B_0x0): does not reset DMA1 and DMAMUX1 blocks (default after reset)

1 (B_0x1): resets DMA1 and DMAMUX1 blocks
DMA2RST

DMA2 and DMAMUX2 blocks reset Set and reset by software.

0 (B_0x0): does not reset DMA2 and DMAMUX2 blocks (default after reset)

1 (B_0x1): resets DMA2 and DMAMUX2 blocks
ADC12RST

ADC1 and 2 blocks reset Set and reset by software.

0 (B_0x0): does not reset ADC1 and 2 blocks (default after reset)

1 (B_0x1): resets ADC1 and 2 blocks
CRCRST

CRC block reset Set and reset by software.

0 (B_0x0): does not reset CRC block (default after reset)

1 (B_0x1): resets CRC block
USB1OTGRST

USB1OTG block reset Set and reset by software.

0 (B_0x0): does not reset USB1OTG block (default after reset)

1 (B_0x1): resets USB1OTG block

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32