stm32 /stm32h7 /STM32H7A3 /RCC /RCC_APB4RSTR

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Interpret as RCC_APB4RSTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SYSCFGRST 0 (B_0x0)LPUART1RST 0 (B_0x0)SPI6RST 0 (B_0x0)I2C4RST 0 (B_0x0)LPTIM2RST 0 (B_0x0)LPTIM3RST 0 (B_0x0)DAC2RST 0 (B_0x0)COMP12RST 0 (B_0x0)VREFRST 0 (B_0x0)DTSRST 0 (B_0x0)DFSDM2RST

VREFRST=B_0x0, DAC2RST=B_0x0, DTSRST=B_0x0, SPI6RST=B_0x0, I2C4RST=B_0x0, COMP12RST=B_0x0, SYSCFGRST=B_0x0, DFSDM2RST=B_0x0, LPUART1RST=B_0x0, LPTIM3RST=B_0x0, LPTIM2RST=B_0x0

Fields

SYSCFGRST

SYSCFG block reset Set and reset by software.

0 (B_0x0): does not reset the SYSCFG block (default after reset)

1 (B_0x1): resets the SYSCFG block

LPUART1RST

LPUART1 block reset Set and reset by software.

0 (B_0x0): does not reset the LPUART1 block (default after reset)

1 (B_0x1): resets the LPUART1 block

SPI6RST

SPI6 block reset Set and reset by software.

0 (B_0x0): does not reset the SPI6 block (default after reset)

1 (B_0x1): resets the SPI6 block

I2C4RST

I2C4 block reset Set and reset by software.

0 (B_0x0): does not reset the I2C4 block (default after reset)

1 (B_0x1): resets the I2C4 block

LPTIM2RST

LPTIM2 block reset Set and reset by software.

0 (B_0x0): does not reset the LPTIM2 block (default after reset)

1 (B_0x1): resets the LPTIM2 block

LPTIM3RST

LPTIM3 block reset Set and reset by software.

0 (B_0x0): does not reset the LPTIM3 block (default after reset)

1 (B_0x1): resets the LPTIM3 block

DAC2RST

DAC2 (containing one converter) reset Set and reset by software.

0 (B_0x0): does not reset the DAC2 (default after reset)

1 (B_0x1): resets the DAC2

COMP12RST

COMP1 and 2 blocks reset Set and reset by software.

0 (B_0x0): does not reset the COMP1 and 2 blocks (default after reset)

1 (B_0x1): resets the COMP1 and 2 blocks

VREFRST

VREF block reset Set and reset by software.

0 (B_0x0): does not reset the VREF block (default after reset)

1 (B_0x1): resets the VREF block

DTSRST

Digital temperature sensor block reset Set and reset by software.

0 (B_0x0): does not reset the DTS block (default after reset)

1 (B_0x1): resets the DTS block

DFSDM2RST

DFSDM2 block reset Set and reset by software.

0 (B_0x0): does not reset the DFSDM2 block (default after reset)

1 (B_0x1): resets the DFSDM2 block

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