Regviz

stm32 /stm32h7 /STM32H7B0 /RCC /RCC_AHB2RSTR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_AHB2RSTR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h7/STM32H7B0/RCC/RCC_AHB2RSTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)DCMI_PSSIRST 0 (B_0x0)HSEMRST 0 (B_0x0)CRYPTRST 0 (B_0x0)HASHRST 0 (B_0x0)RNGRST 0 (B_0x0)SDMMC2RST 0 (B_0x0)BDMA1RST

SDMMC2RST=B_0x0, HSEMRST=B_0x0, DCMI_PSSIRST=B_0x0, RNGRST=B_0x0, CRYPTRST=B_0x0, BDMA1RST=B_0x0, HASHRST=B_0x0

Fields

DCMI_PSSIRST

digital camera interface block reset (DCMI or PSSI depending which IP is active) Set and reset by software.

0 (B_0x0): does not reset the DCMI/PSSI block (default after reset)

1 (B_0x1): resets the DCMI/PSSI block
HSEMRST

HSEM block reset Set and reset by software.

0 (B_0x0): does not reset HSEM block (default after reset)

1 (B_0x1): resets HSEM block
CRYPTRST

cryptography block reset Set and reset by software.

0 (B_0x0): does not reset cryptography block (default after reset)

1 (B_0x1): resets cryptography block
HASHRST

hash block reset Set and reset by software.

0 (B_0x0): does not reset hash block (default after reset)

1 (B_0x1): resets hash block
RNGRST

random number generator block reset Set and reset by software.

0 (B_0x0): does not reset RNG block (default after reset)

1 (B_0x1): resets RNG block
SDMMC2RST

SDMMC2 and SDMMC2 delay blocks reset Set and reset by software.

0 (B_0x0): does not reset SDMMC2 and SDMMC2 delay blocks (default after reset)

1 (B_0x1): resets SDMMC2 and SDMMC2 delay blocks
BDMA1RST

BDMA1 reset (DFSDM dedicated DMA) Set and reset by software.

0 (B_0x0): does not reset DMA block (default after reset)

1 (B_0x1): resets DMA block

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32