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stm32 /stm32h7 /STM32H7B0 /SYSCFG /SYSCFG_BRK_LOCKUPR

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Interpret as SYSCFG_BRK_LOCKUPR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PVDL)PVDL 0 (FLASHL)FLASHL 0 (CM7L)CM7L 0 (DTCML)DTCML 0 (ITCML)ITCML

Description

SYSCFG timer break lockup register

Fields

PVDL

PVD lock enable bit.
FLASHL

Flash double ECC error lock bit
CM7L

Cortex®-M7 LOCKUP (HardFault) output enable bit
DTCML

D1TCM or D0TCM double ECC error signal lock
ITCML

ITCM double ECC error signal lock

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32