stm32 /stm32h7 /STM32H7B3 /BDMA1 /BDMA_CCR5

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Interpret as BDMA_CCR5

Description

DMA channel x configuration register

Fields

EN	Channel enable This bit is set and cleared by software.
TCIE	Transfer complete interrupt enable This bit is set and cleared by software.
HTIE	Half transfer interrupt enable This bit is set and cleared by software.
TEIE	Transfer error interrupt enable This bit is set and cleared by software.
DIR	Data transfer direction This bit is set and cleared by software.
CIRC	Circular mode This bit is set and cleared by software.
PINC	Peripheral increment mode This bit is set and cleared by software.
MINC	Memory increment mode This bit is set and cleared by software.
PSIZE	Peripheral size These bits are set and cleared by software.
MSIZE	Memory size These bits are set and cleared by software.
PL	Channel priority level These bits are set and cleared by software.
MEM2MEM	Memory to memory mode This bit is set and cleared by software.

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