stm32 /stm32h7rs /STM32H7R /ADF /ADF_SADCR

Sound activity detector enable This bit is set and cleared by software. It is used to enable/disable the SAD.

0 (B_0x0): SAD disabled and SAD state reset

1 (B_0x1): SAD enabled

Data capture mode This field is set and cleared by software. It is used to define in which conditions, the samples provided by DLFT0 are stored into the memory. 1x: Samples from DFLT0 transfered into memory when SAD and DFLT0 are enabled Note: This field can be write-protected (see Section 46.4.13: Register protection for details).

0 (B_0x0): Samples from DFLT0 not transfered into the memory

1 (B_0x1): Samples from DFLT0 transfered into the memory when SAD is in DETECT state

Sound trigger event configuration This bit is set and cleared by software. It is used to define if the sddet_evt event is generated only when the SAD enters to MONITOR state or when the SAD enters or exits the DETECT state. Note: This bit can be write-protected (see Section 46.4.13: Register protection for details).

0 (B_0x0): sddet_evt generated when SAD enters the MONITOR state

1 (B_0x1): sddet_evt generated when SAD enters or exits the DETECT state

SAD state This field is set and cleared by hardware. It indicates the SAD state and is meaningful only when SADEN = 1. The SAD state can be:

• LEARN when the SAD is in learning phase or in SDLVL computation mode
• MONITOR when the SAD is in monitoring phase
• DETECT when the SAD detects a sound

0 (B_0x0): SAD in LEARN state

1 (B_0x1): SAD in MONITOR state

3 (B_0x3): SAD in DETECT state

Hysteresis enable This bit is set and cleared by software. It is used to enable/disable the hysteresis function (see Table 419 for details). This bit must be kept to 0 when SADMOD[1:0] = 1x. Note: This bit can be write-protected (see Section 46.4.13: Register protection for details).

0 (B_0x0): Hysteresis function disabled. THR_H is always used.

1 (B_0x1): Hysteresis function enabled. THR_H is used for MONITOR to DETECT transition and THR_L is used for DETECT to MONITOR transition.

Frame size This field is set and cleared by software. it is used to define the size of one frame and also to define how many samples are taken into account to compute the short-term signal level. 11x: 512 PCM samples used to compute the short-term signal level Note: This field can be write-protected (see Section 46.4.13: Register protection for details).

0 (B_0x0): 8 PCM samples used to compute the short-term signal level

1 (B_0x1): 16 PCM samples used to compute the short-term signal level

2 (B_0x2): 32 PCM samples used to compute the short-term signal level

3 (B_0x3): 64 PCM samples used to compute the short-term signal level

4 (B_0x4): 128 PCM samples used to compute the short-term signal level

5 (B_0x5): 256 PCM samples used to compute the short-term signal level

SAD working mode This field is set and cleared by software. It is used to define the way the SAD works. The SAD triggers when the sound level (SDLVL) is bigger than the defined threshold. In this mode, the SAD works like a voice activity detector. The SAD triggers when the sound level (SDLVL) is bigger than the defined threshold. In this mode, the SAD works like a sound detector. 1x: Threshold value given by 4 x ANMIN[12:0] The SAD triggers when the estimated ambient noise (ANLVL), multiplied by the gain selected by SNTHR[3:0] is bigger than the defined threshold. In this mode, the SAD is working like an ambient noise estimator. Hysteresis function cannot be used in this mode. Note: This field can be write-protected (see Section 46.4.13: Register protection for details).

0 (B_0x0): Threshold value computed according to the estimated ambient noise

1 (B_0x1): Threshold value equal to ANMIN[12:0], multiplied by the gain selected by SNTHR[3:0]

SAD Active flag This bit is set and cleared by hardware. It is used to check if the SAD is effectively enabled (active) or not. The protected fields and registers of this function can only be updated when the SADACTIVE is set to 0 (see Section 46.4.13: Register protection for details). The delay between a transition on SADEN and a transition on SADACTIVE is two periods of AHB clock and two periods of adf_proc_ck.

0 (B_0x0): SAD not active and can be configured if needed

1 (B_0x1): SAD active and protected fields cannot be configured.