RegViz: Visualize DBGMCU_AHB5FZR Bitfield

stm32 /stm32h7rs /STM32H7R /DBGMCU /DBGMCU_AHB5FZR

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Interpret as DBGMCU_AHB5FZR

DBG_HPDMA_1_STOP=B_0x0, DBG_HPDMA_13_STOP=B_0x0, DBG_HPDMA_10_STOP=B_0x0, DBG_HPDMA_6_STOP=B_0x0, DBG_HPDMA_2_STOP=B_0x0, DBG_HPDMA_0_STOP=B_0x0, DBG_HPDMA_11_STOP=B_0x0, DBG_HPDMA_4_STOP=B_0x0, DBG_HPDMA_7_STOP=B_0x0, DBG_HPDMA_5_STOP=B_0x0, DBG_HPDMA_3_STOP=B_0x0, DBG_HPDMA_15_STOP=B_0x0, DBG_HPDMA_9_STOP=B_0x0, DBG_HPDMA_8_STOP=B_0x0, DBG_HPDMA_12_STOP=B_0x0, DBG_HPDMA_14_STOP=B_0x0

Description

DBGMCU AHB5 peripheral freeze register

Fields

DBG_HPDMA_0_STOP	HPDMA channel 0 stop in debug 0 (B_0x0): normal operation. HPDMA channel 0 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 0 is frozen while the CPU is in debug mode.
DBG_HPDMA_1_STOP	HPDMA channel 1 stop in debug 0 (B_0x0): normal operation. HPDMA channel 1continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 1 is frozen while the CPU is in debug mode.
DBG_HPDMA_2_STOP	HPDMA channel 2 stop in debug 0 (B_0x0): normal operation. HPDMA channel 2 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 2 is frozen while the CPU is in debug mode.
DBG_HPDMA_3_STOP	HPDMA channel 3 stop in debug 0 (B_0x0): normal operation. HPDMA channel 3 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 3 is frozen while the CPU is in debug mode.
DBG_HPDMA_4_STOP	HPDMA channel 4 stop in debug 0 (B_0x0): normal operation. HPDMA channel 4 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 4 is frozen while the CPU is in debug mode.
DBG_HPDMA_5_STOP	HPDMA channel 5 stop in debug 0 (B_0x0): normal operation. HPDMA channel 5 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 5 is frozen while the CPU is in debug mode.
DBG_HPDMA_6_STOP	HPDMA channel 6 stop in debug 0 (B_0x0): normal operation. HPDMA channel 6 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 6 is frozen while the CPU is in debug mode.
DBG_HPDMA_7_STOP	HPDMA channel 7 stop in debug 0 (B_0x0): normal operation. HPDMA channel 7 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 7 is frozen while the CPU is in debug mode.
DBG_HPDMA_8_STOP	HPDMA channel 8 stop in debug 0 (B_0x0): normal operation. HPDMA channel 8 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel _ is frozen while the CPU is in debug mode.
DBG_HPDMA_9_STOP	HPDMA channel 9 stop in debug 0 (B_0x0): normal operation. HPDMA channel 9 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 9 is frozen while the CPU is in debug mode.
DBG_HPDMA_10_STOP	HPDMA channel 10 stop in debug 0 (B_0x0): normal operation. HPDMA channel 10 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 10 is frozen while the CPU is in debug mode.
DBG_HPDMA_11_STOP	HPDMA channel 11 stop in debug 0 (B_0x0): normal operation. HPDMA channel 11 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 11 is frozen while the CPU is in debug mode.
DBG_HPDMA_12_STOP	HPDMA channel 12 stop in debug 0 (B_0x0): normal operation. HPDMA channel 12 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 12 is frozen while the CPU is in debug mode.
DBG_HPDMA_13_STOP	HPDMA channel 13 stop in debug 0 (B_0x0): normal operation. HPDMA channel 13 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 13 is frozen while the CPU is in debug mode.
DBG_HPDMA_14_STOP	HPDMA channel 14 stop in debug 0 (B_0x0): normal operation. HPDMA channel 14 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 14 is frozen while the CPU s in debug mode.
DBG_HPDMA_15_STOP	HPDMA channel 15 stop in debug 0 (B_0x0): normal operation. HPDMA channel 15 continues to operate while the CPU is in debug mode. 1 (B_0x1): stop in debug. HPDMA channel 15 is frozen while the CPU is in debug mode.

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