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stm32 /stm32h7rs /STM32H7R /DBGMCU /DBGMCU_APB2FZ

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Interpret as DBGMCU_APB2FZ

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TIM1 0 (B_0x0)TIM15 0 (B_0x0)TIM16 0 (B_0x0)TIM17 0 (B_0x0)TIM9

TIM9=B_0x0, TIM16=B_0x0, TIM1=B_0x0, TIM17=B_0x0, TIM15=B_0x0

Description

DBGMCU APB2 peripheral freeze register

Fields

TIM1

TIM1 stop in debug

0 (B_0x0): Normal operation - TIM1 continues operating while the core is in Debug mode

1 (B_0x1): Stop in debug - TIM1 is frozen and TIM1 outputs are disabled while Cortex-M7 is in Debug mode.
TIM15

TIM15 stop in debug

0 (B_0x0): Normal operation - TIM15 continues operating while the core is in Debug mode

1 (B_0x1): Stop in debug - TIM15 is frozen and TIM15 outputs are disabled while Cortex-M7 is in Debug mode
TIM16

TIM16 stop in debug

0 (B_0x0): Normal operation - TIM16 continues operating while the core is in Debug mode

1 (B_0x1): Stop in debug - TIM16 is frozen and TIM16 outputs are disabled while Cortex-M7 is in Debug mode
TIM17

TIM17 stop in debug

0 (B_0x0): Normal operation - TIM17 continues operating while the core is in Debug mode

1 (B_0x1): Stop in debug - TIM17 is frozen and TIM17 outputs are disabled while Cortex-M7 is in Debug mode
TIM9

TIM9 stop in debug

0 (B_0x0): Normal operation - TIM9 continues operating while the core is in Debug mode

1 (B_0x1): Stop in debug - TIM9 is frozen and TIM9 outputs are disabled while Cortex-M7 is in Debug mode

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32