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stm32 /stm32h7rs /STM32H7R /DCMIPP /DCMIPP_CMFRCR

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Interpret as DCMIPP_CMFRCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0FRMCNT

Description

DCMIPP common frame counter register

Fields

FRMCNT

Frame counter, read-only, loops around. Incremented following VSYNC detection mapped to the pipe configured into bits PSFC[1:0] of the DCMIPP_CMCR register. The counter is cleared using the CRC bit in the DCMIPP_CMCR register.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32