DCMIPP Pipe0 interrupt clear register
| CLINEF | Multi-line capture complete interrupt status clear Writing a 1 into this bit clears LINEF in the DCMIPP_P0SR register. |
| CFRAMEF | Frame capture complete interrupt status clear Writing a 1 into this bit clears the FRAMEF bit in the DCMIPP_P0SR register. |
| CVSYNCF | Vertical synchronization interrupt status clear Writing a 1 into this bit clears the VSYNCF bit in the DCMIPP_P0SR register. |
| CLIMITF | limit interrupt status clear Writing a 1 into this bit clears LIMITF in the DCMIPP_P0SR register. |
| COVRF | Overrun interrupt status clear Writing a 1 into this bit clears the OVRF bit in the DCMIPP_P0SR register. |