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stm32 /stm32h7rs /STM32H7R /LTDC /LTDC_L1BFCR

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Interpret as LTDC_L1BFCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)BF20 (B_0x0)BF1

BF2=B_0x0, BF1=B_0x0

Description

LTDC layer 1 blending factors configuration register

Fields

BF2

blending factor 2 These bits select the blending factor F2

0 (B_0x0): FIELD Reserved

1 (B_0x1): FIELD Reserved

2 (B_0x2): FIELD Reserved

3 (B_0x3): FIELD Reserved

4 (B_0x4): FIELD Reserved

5 (B_0x5): 1 - constant alpha

6 (B_0x6): FIELD Reserved

7 (B_0x7): 1 - (pixel alpha x constant alpha)
BF1

blending factor 1 These bits select the blending factor F1.

0 (B_0x0): FIELD Reserved

1 (B_0x1): FIELD Reserved

2 (B_0x2): FIELD Reserved

3 (B_0x3): FIELD Reserved

4 (B_0x4): constant alpha

5 (B_0x5): FIELD Reserved

6 (B_0x6): pixel alpha x constant alpha

7 (B_0x7): FIELD Reserved

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32