RDIE=B_0x0, WRIE=B_0x0, EN=B_0x0, DPC=B_0x0, EIE=B_0x0
MDIOS configuration register
| EN | peripheral enable 0 (B_0x0): MDIOS is disabled. 1 (B_0x1): MDIOS is enabled and monitoring the MDIO bus (MDC/MDIO). |
| WRIE | register write interrupt enable Note: When this bit is set, an interrupt is generated if any of the read flags (WRF[31:0] in the MDIOS_WRFR register) is set. 0 (B_0x0): Interrupt is disabled. 1 (B_0x1): Interrupt is enabled. |
| RDIE | register read interrupt enable Note: When this bit is set, an interrupt is generated if any of the read flags (RDF[31:0] in the MDIOS_RDFR register) is set. 0 (B_0x0): Interrupt is disabled. 1 (B_0x1): Interrupt is enabled. |
| EIE | error interrupt enable Note: When this bit is set, an interrupt is generated if any of the error flags (PERF, SERF, or TERF in the MDIOS_SR register) is set. 0 (B_0x0): Interrupt is disabled. 1 (B_0x1): Interrupt is enabled. |
| DPC | disable preamble check Note: When this bit is set, the application must be sure that no frame is currently in progress when the MDIOS is enabled. Otherwise, the MDIOS can become desynchronized with the master. Note: This bit cannot be changed unless EN = 0 (though it can be changed at the same time that EN is being set). 0 (B_0x0): MDIO master must give preamble before each frame. 1 (B_0x1): MDIO master can send each frame without a preceding preamble, and the MDIOS does not signal a preamble error. |
| PORT_ADDRESS | slave address Can be written only when the peripheral is disabled (EN = 0). If the address given by the MDIO master matches PORT_ADRESS[4:0], then the MDIOS services the frame. Otherwise the frame is ignored. |