PVDO=B_0x0, ACTVOSRDY=B_0x0, AVDO=B_0x0
PWR control status register 1
| ACTVOS | VOS currently applied for VCORE voltage scaling selection. These bit reflect the last VOS value applied to the PMU. |
| ACTVOSRDY | Voltage levels ready bit for currently used ACTVOS and SDHILEVEL This bit is set to 1 by hardware when the voltage regulator and the SMPS step-down converter are both disabled and Bypass mode is selected in PWR control register 2 (PWR_CSR2). 0 (B_0x0): Voltage level invalid, above or below current ACTVOS and SDHILEVEL selected levels. 1 (B_0x1): Voltage level valid, at current ACTVOS and SDHILEVEL selected levels. |
| PVDO | Programmable voltage detect output This bit is set and cleared by hardware. It is valid only if the PVD has been enabled by the PVDE bit. PLS[2:0] bits. bits. Note: Since the PVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the PVDE bit is set. 0 (B_0x0): VDD or PVD_IN voltage is equal or higher than the PVD threshold selected through the 1 (B_0x1): VDD or PVD_IN voltage is lower than the PVD threshold selected through the PLS[2:0] |
| AVDO | Analog voltage detector output on VDDA This bit is set and cleared by hardware. It is valid only if AVD on VDDA is enabled by the AVDEN bit. Note: Since the AVD is disabled in Standby mode, this bit is equal to 0 after Standby or reset until the AVDEN bit is set 0 (B_0x0): VDDA is equal or higher than the AVD threshold selected with the ALS[1:0] bits. 1 (B_0x1): VDDA is lower than the AVD threshold selected with the ALS[1:0] bits |