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stm32 /stm32h7rs /STM32H7R /RCC /RCC_AHB1RSTR

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Interpret as RCC_AHB1RSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GPDMA1RST 0 (B_0x0)ADC12RST 0 (B_0x0)ETH1RST 0 (B_0x0)OTGHSRST 0 (B_0x0)USBPHYCRST 0 (B_0x0)OTGFSRST 0 (B_0x0)ADFRST

GPDMA1RST=B_0x0, ADFRST=B_0x0, OTGHSRST=B_0x0, ADC12RST=B_0x0, USBPHYCRST=B_0x0, OTGFSRST=B_0x0, ETH1RST=B_0x0

Description

RCC AHB1 peripheral reset register

Fields

GPDMA1RST

GPDMA1 blocks reset Set and reset by software.

0 (B_0x0): does not reset GPDMA1 block (default after reset)

1 (B_0x1): resets GPDMA1 block
ADC12RST

ADC1 and 2 blocks reset Set and reset by software.

0 (B_0x0): does not reset ADC1 and 2 blocks (default after reset)

1 (B_0x1): resets ADC1 and 2 blocks
ETH1RST

ETH1 block reset Set and reset by software.

0 (B_0x0): does not reset ETH1 block (default after reset)

1 (B_0x1): resets ETH1 block
OTGHSRST

OTGHS block reset Set and reset by software.

0 (B_0x0): does not reset OTGHS block (default after reset)

1 (B_0x1): resets OTGHS block
USBPHYCRST

USBPHYC block reset Set and reset by software.

0 (B_0x0): does not reset USBPHYC block (default after reset)

1 (B_0x1): resets USBPHYC block
OTGFSRST

OTGFS block reset Set and reset by software.

0 (B_0x0): does not reset OTGFS block (default after reset)

1 (B_0x1): resets OTGFS block
ADFRST

ADF block reset Set and reset by software.

0 (B_0x0): does not reset ADF block (default after reset)

1 (B_0x1): resets ADF block

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32