stm32 /stm32h7rs /STM32H7R /RCC /RCC_AHB3LPENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_AHB3LPENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)RNGLPEN 0 (B_0x0)HASHLPEN

RNGLPEN=B_0x0, HASHLPEN=B_0x0

Description

RCC AHB3 low-power clock enable register

Fields

RNGLPEN

RNG peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): RNG peripheral clocks disabled in low-power mode

1 (B_0x1): RNG peripheral clock enabled in low-power mode (default after reset)

HASHLPEN

HASH peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): HASH peripheral clock disabled in low-power mode

1 (B_0x1): HASH peripheral clock enabled in low-power mode (default after reset)

Links

()