Regviz

stm32 /stm32h7rs /STM32H7R /RCC /RCC_AHB4RSTR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_AHB4RSTR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32h7rs/STM32H7R/RCC/RCC_AHB4RSTR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GPIOARST 0 (B_0x0)GPIOBRST 0 (B_0x0)GPIOCRST 0 (B_0x0)GPIODRST 0 (B_0x0)GPIOERST 0 (B_0x0)GPIOFRST 0 (B_0x0)GPIOGRST 0 (B_0x0)GPIOHRST 0 (B_0x0)GPIOMRST 0 (B_0x0)GPIONRST 0 (B_0x0)GPIOORST 0 (B_0x0)GPIOPRST 0 (B_0x0)CRCRST

GPIOBRST=B_0x0, GPIOGRST=B_0x0, GPIOERST=B_0x0, GPIOARST=B_0x0, GPIOCRST=B_0x0, CRCRST=B_0x0, GPIONRST=B_0x0, GPIOPRST=B_0x0, GPIOMRST=B_0x0, GPIOHRST=B_0x0, GPIOORST=B_0x0, GPIOFRST=B_0x0, GPIODRST=B_0x0

Description

RCC AHB4 peripheral reset register

Fields

GPIOARST

GPIOA block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOA block (default after reset)

1 (B_0x1): resets the GPIOA block
GPIOBRST

GPIOB block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOB block (default after reset)

1 (B_0x1): resets the GPIOB block
GPIOCRST

GPIOC block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOC block (default after reset)

1 (B_0x1): resets the GPIOC block
GPIODRST

GPIOD block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOD block (default after reset)

1 (B_0x1): resets the GPIOD block
GPIOERST

GPIOE block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOE block (default after reset)

1 (B_0x1): resets the GPIOE block
GPIOFRST

GPIOF block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOF block (default after reset)

1 (B_0x1): resets the GPIOF block
GPIOGRST

GPIOG block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOG block (default after reset)

1 (B_0x1): resets the GPIOG block
GPIOHRST

GPIOH block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOH block (default after reset)

1 (B_0x1): resets the GPIOH block
GPIOMRST

GPIOM block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOM block (default after reset)

1 (B_0x1): resets the GPIOM block
GPIONRST

GPION block reset Set and reset by software.

0 (B_0x0): does not reset the GPION block (default after reset)

1 (B_0x1): resets the GPION block
GPIOORST

GPIOO block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOO block (default after reset)

1 (B_0x1): resets the GPIOO block
GPIOPRST

GPIOP block reset Set and reset by software.

0 (B_0x0): does not reset the GPIOP block (default after reset)

1 (B_0x1): resets the GPIOP block
CRCRST

CRC block reset Set and reset by software.

0 (B_0x0): does not reset the CRC block (default after reset)

1 (B_0x1): resets the CRC block

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32