stm32 /stm32h7rs /STM32H7R /RCC /RCC_APB2LPENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_APB2LPENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TIM1LPEN 0 (B_0x0)USART1LPEN 0 (B_0x0)SPI1LPEN 0 (B_0x0)SPI4LPEN 0 (B_0x0)TIM15LPEN 0 (B_0x0)TIM16LPEN 0 (B_0x0)TIM17LPEN 0 (B_0x0)TIM9LPEN 0 (B_0x0)SPI5LPEN 0 (B_0x0)SAI1LPEN 0 (B_0x0)SAI2LPEN

TIM15LPEN=B_0x0, SAI2LPEN=B_0x0, SPI1LPEN=B_0x0, USART1LPEN=B_0x0, TIM17LPEN=B_0x0, SAI1LPEN=B_0x0, TIM1LPEN=B_0x0, SPI4LPEN=B_0x0, SPI5LPEN=B_0x0, TIM9LPEN=B_0x0, TIM16LPEN=B_0x0

Description

RCC APB2 low-power clock enable register

Fields

TIM1LPEN

TIM1 peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): TIM1 peripheral clock disabled in low-power mode

1 (B_0x1): TIM1 peripheral clock enabled in low-power mode (default after reset)

USART1LPEN

USART1 peripheral clock enable in low-power mode Set and reset by software. The peripheral clocks of the USART1 are the kernel clock selected by USART169SEL and provided to UCLK inputs, and the pclk2 bus interface clock.

0 (B_0x0): USART1 peripheral clocks disabled in low-power mode

1 (B_0x1): USART1 peripheral clocks enabled in low-power mode (default after reset)

SPI1LPEN

SPI2S1 peripheral clock enable in low-power mode Set and reset by software. The peripheral clocks of the SPI2S1 are: the kernel clock selected by I2S1SEL and provided to spi_ker_ck input, and the pclk2 bus interface clock.

0 (B_0x0): SPI2S1 peripheral clocks disabled in low-power mode

1 (B_0x1): SPI2S1 peripheral clocks enabled in low-power mode (default after reset)

SPI4LPEN

SPI4 peripheral clock enable in low-power mode Set and reset by software. The peripheral clocks of the SPI4 are: the kernel clock selected by SPI45SEL and provided to com_clk input, and the pclk2 bus interface clock.

0 (B_0x0): SPI4 peripheral clocks disabled in low-power mode

1 (B_0x1): SPI4 peripheral clocks enabled in low-power mode (default after reset)

TIM15LPEN

TIM15 peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): TIM15 peripheral clock disabled in low-power mode

1 (B_0x1): TIM15 peripheral clock enabled in low-power mode (default after reset)

TIM16LPEN

TIM16 peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): TIM16 peripheral clock disabled in low-power mode

1 (B_0x1): TIM16 peripheral clock enabled in low-power mode (default after reset)

TIM17LPEN

TIM17 peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): TIM17 peripheral clock disabled in low-power mode

1 (B_0x1): TIM17 peripheral clock enabled in low-power mode (default after reset)

TIM9LPEN

TIM9 peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): TIM9 peripheral clock disabled in low-power mode

1 (B_0x1): TIM9 peripheral clock enabled in low-power mode (default after reset)

SPI5LPEN

SPI5 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the SPI5 are the kernel clock selected by SPI45SEL and provided to com_clk input, and the pclk2 bus interface clock.

0 (B_0x0): SPI5 peripheral clocks disabled in low-power mode

1 (B_0x1): SPI5 peripheral clocks enabled in low-power mode (default after reset)

SAI1LPEN

SAI1 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the SAI1 are: the kernel clock selected by SAI1SEL and provided to SAI_CK_A and SAI_CK_B inputs, and the pclk2 bus interface clock.

0 (B_0x0): SAI1 peripheral clocks disabled in low-power mode

1 (B_0x1): SAI1 peripheral clocks enabled in low-power mode (default after reset)

SAI2LPEN

SAI2 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the SAI2 are: the kernel clock selected by SAI2SEL and provided to SAI_CK_A and SAI_CK_B inputs, and the pclk2 bus interface clock.

0 (B_0x0): SAI2 peripheral clocks disabled in low-power mode

1 (B_0x1): SAI2 peripheral clocks enabled in low-power mode (default after reset)

Links

()