stm32 /stm32h7rs /STM32H7R /RCC /RCC_APB4LPENR

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Interpret as RCC_APB4LPENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SBSLPEN 0 (B_0x0)LPUART1LPEN 0 (B_0x0)SPI6LPEN 0 (B_0x0)LPTIM2LPEN 0 (B_0x0)LPTIM3LPEN 0 (B_0x0)LPTIM4LPEN 0 (B_0x0)LPTIM5LPEN 0 (B_0x0)VREFLPEN 0 (B_0x0)RTCAPBLPEN 0 (B_0x0)TMPSENSLPEN

LPTIM4LPEN=B_0x0, LPTIM2LPEN=B_0x0, VREFLPEN=B_0x0, SPI6LPEN=B_0x0, LPTIM3LPEN=B_0x0, LPUART1LPEN=B_0x0, RTCAPBLPEN=B_0x0, LPTIM5LPEN=B_0x0, TMPSENSLPEN=B_0x0, SBSLPEN=B_0x0

Description

RCC APB4 low-power clock enable register

Fields

SBSLPEN

SBS peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): SBS peripheral clock disabled in low-power mode

1 (B_0x1): SBS peripheral clock enabled in low-power mode (default after reset)

LPUART1LPEN

LPUART1 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the LPUART1 are the kernel clock selected by LPUART1SEL and provided to UCLK input, and the rcc_pclk4 bus interface clock.

0 (B_0x0): LPUART1 peripheral clocks disabled in low-power mode

1 (B_0x1): LPUART1 peripheral clocks enabled in low-power mode (default after reset)

SPI6LPEN

SPI/I2S6 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the SPI/I2S6 are the kernel clock selected by SPI6SEL and provided to com_ck input, and the rcc_pclk4 bus interface clock.

0 (B_0x0): SPI/I2S6 peripheral clocks disabled in low-power mode

1 (B_0x1): SPI/I2S6 peripheral clocks enabled in low-power mode (default after reset)

LPTIM2LPEN

LPTIM2 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the LPTIM2 are the kernel clock selected by LPTIM23SEL and provided to clk_lpt input, and the pclk4 bus interface clock.

0 (B_0x0): LPTIM2 peripheral clocks disabled in low-power mode

1 (B_0x1): LPTIM2 peripheral clocks enabled in low-power mode (default after reset)

LPTIM3LPEN

LPTIM3 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the LPTIM3 are the kernel clock selected by LPTIM23SEL and provided to clk_lpt input, and the pclk4 bus interface clock.

0 (B_0x0): LPTIM3 peripheral clocks disabled in low-power mode

1 (B_0x1): LPTIM3 peripheral clocks enabled in low-power mode (default after reset)

LPTIM4LPEN

LPTIM4 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the LPTIM4 are the kernel clock selected by LPTIM45SEL and provided to clk_lpt input, and the pclk4 bus interface clock.

0 (B_0x0): LPTIM4 peripheral clocks disabled in low-power mode

1 (B_0x1): LPTIM4 peripheral clocks enabled in low-power mode (default after reset)

LPTIM5LPEN

LPTIM5 peripheral clocks enable in low-power mode Set and reset by software. The peripheral clocks of the LPTIM5 are the kernel clock selected by LPTIM45SEL and provided to clk_lpt input, and the pclk4 bus interface clock.

0 (B_0x0): LPTIM5 peripheral clocks disabled in low-power mode

1 (B_0x1): LPTIM5 peripheral clocks enabled in low-power mode (default after reset)

VREFLPEN

VREF peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): VREF peripheral clock disabled in low-power mode

1 (B_0x1): VREF peripheral clock enabled in low-power mode (default after reset)

RTCAPBLPEN

RTC APB clock enable in low-power mode Set and reset by software.

0 (B_0x0): The register clock interface of the RTC (APB) is disabled in low-power mode

1 (B_0x1): The register clock interface of the RTC (APB) is enabled in low-power mode (default after reset)

TMPSENSLPEN

temperature sensor peripheral clock enable in low-power mode Set and reset by software.

0 (B_0x0): TMPSENS peripheral clock disabled in low-power mode

1 (B_0x1): TMPSENS peripheral clock enabled in low-power mode (default after reset)

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