stm32 /stm32h7rs /STM32H7R /RCC /RCC_APB4RSTR

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Interpret as RCC_APB4RSTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SBSRST 0 (B_0x0)LPUART1RST 0 (B_0x0)SPI6RST 0 (B_0x0)LPTIM2RST 0 (B_0x0)LPTIM3RST 0 (B_0x0)LPTIM4RST 0 (B_0x0)LPTIM5RST 0 (B_0x0)VREFRST 0 (B_0x0)TMPSENSRST

VREFRST=B_0x0, LPTIM2RST=B_0x0, LPUART1RST=B_0x0, LPTIM3RST=B_0x0, TMPSENSRST=B_0x0, SPI6RST=B_0x0, SBSRST=B_0x0, LPTIM5RST=B_0x0, LPTIM4RST=B_0x0

Description

RCC APB4 peripheral reset register

Fields

SBSRST

SBS block reset Set and reset by software.

0 (B_0x0): does not reset the SBS block (default after reset)

1 (B_0x1): resets the SBS block

LPUART1RST

LPUART1 block reset Set and reset by software.

0 (B_0x0): does not reset the LPUART1 block (default after reset)

1 (B_0x1): resets the LPUART1 block

SPI6RST

SPI/I2S6 block reset Set and reset by software.

0 (B_0x0): does not reset the SPI/I2S6 block (default after reset)

1 (B_0x1): resets the SPI/I2S6 block

LPTIM2RST

LPTIM2 block reset Set and reset by software.

0 (B_0x0): does not reset the LPTIM2 block (default after reset)

1 (B_0x1): resets the LPTIM2 block

LPTIM3RST

LPTIM3 block reset Set and reset by software.

0 (B_0x0): does not reset the LPTIM3 block (default after reset)

1 (B_0x1): resets the LPTIM3 block

LPTIM4RST

LPTIM4 block reset Set and reset by software.

0 (B_0x0): does not reset the LPTIM4 block (default after reset)

1 (B_0x1): resets the LPTIM4 block

LPTIM5RST

LPTIM5 block reset Set and reset by software.

0 (B_0x0): does not reset the LPTIM5 block (default after reset)

1 (B_0x1): resets the LPTIM5 block

VREFRST

VREF block reset Set and reset by software.

0 (B_0x0): does not reset the VREF block (default after reset)

1 (B_0x1): resets the VREF block

TMPSENSRST

TMPSENS block reset Set and reset by software.

0 (B_0x0): does not reset the TMPSENS block (default after reset)

1 (B_0x1): resets the TMPSENS block

Links

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