stm32 /stm32h7rs /STM32H7R /SPDIFRX /SPDIFRX_CSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SPDIFRX_CSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0USR0CS0 (B_0x0)SOB

SOB=B_0x0

Description

SPDIFRX channel status register

Fields

USR

user data information Bit USR[0] is the oldest value, and comes from channel A, USR[1] comes channel B. So USR[n] bits come from channel A is n is even, otherwise they come from channel B.

CS

channel A status information Bit CS[0] is the oldest value

SOB

start of block This bit indicates if the bit CS[0] corresponds to the first bit of a new block

0 (B_0x0): CS[0] is not the first bit of a new block

1 (B_0x1): CS[0] is the first bit of a new block

Links

()