stm32 /stm32h7rs /STM32H7R /SPI1 /SPI_SR

Rx-packet available The flag is changed by hardware. It monitors the total number of data currently available at RxFIFO if SPI is enabled. RXP value depends on the FIFO threshold (FTHLV[3:0]), data frame size (DSIZE[4:0] in SPI mode and DATLEN[1:0] in I2S/PCM mode), and actual communication flow. If the data packet is read by performing consecutive read operations from SPI_RXDR, RXP flag must be checked again once a complete data packet is read out from RxFIFO.

0 (B_0x0): RxFIFO is empty or an incomplete data packet is received

1 (B_0x1): RxFIFO contains at least one data packet

Tx-packet space available TXP flag can be changed only by hardware. Its value depends on the physical size of the FIFO and its threshold (FTHLV[3:0]), data frame size (DSIZE[4:0] in SPI mode and respective DATLEN[1:0] in I2S/PCM mode), and actual communication flow. If the data packet is stored by performing consecutive write operations to SPI_TXDR, TXP flag must be checked again once a complete data packet is stored at TxFIFO. TXP is set despite SPI TxFIFO becomes inaccessible when SPI is reset or disabled.

0 (B_0x0): not enough free space at TxFIFO to host next data packet

1 (B_0x1): enough free space at TxFIFO to host at least one data packet

duplex packet DXP flag is set whenever both TXP and RXP flags are set regardless SPI mode.

0 (B_0x0): TxFIFO is Full and/or RxFIFO is Empty

1 (B_0x1): both TxFIFO has space for write and RxFIFO contains for read a single packet at least

end of transfer EOT is set by hardware as soon as a full transfer is complete, that is when SPI is re-enabled or when TSIZE number of data have been transmitted and/or received on the SPI. EOT is cleared when SPI is re-enabled or by writing 1 to EOTC bit of SPI_IFCR optionally. EOT flag triggers an interrupt if EOTIE bit is set. If DXP flag is used until TXTF flag is set and DXPIE is cleared, EOT can be used to download the last packets contained into RxFIFO in one-shot. In master, EOT event terminates the data transaction and handles SS output optionally. When CRC is applied, the EOT event is extended over the CRC frame transaction. To restart the internal state machine properly, SPI is strongly suggested to be disabled and re-enabled before next transaction starts despite its setting is not changed.

0 (B_0x0): transfer is ongoing or not started

1 (B_0x1): transfer complete

transmission transfer filled TXTF is set by hardware as soon as all of the data packets in a transfer have been submitted for transmission by application software or DMA, that is when TSIZE number of data have been pushed into the TxFIFO. This bit is cleared by software write 1 to TXTFC bit of SPI_IFCR exclusively. TXTF flag triggers an interrupt if TXTFIE bit is set. TXTF setting clears the TXPIE and DXPIE masks so to off-load application software from calculating when to disable TXP and DXP interrupts.

0 (B_0x0): upload of TxFIFO is ongoing or not started

1 (B_0x1): TxFIFO upload is finished

underrun This bit is cleared when SPI is re-enabled or by writing 1 to UDRC bit of SPI_IFCR optionally. Note: In SPI mode, the UDR flag applies to Slave mode only. In I2S/PCM mode, (when available) this flag applies to Master and Slave mode

0 (B_0x0): no underrun

1 (B_0x1): underrun detected

overrun This bit is cleared when SPI is re-enabled or by writing 1 to OVRC bit of SPI_IFCR optionally.

0 (B_0x0): no overrun

1 (B_0x1): overrun detected

CRC error This bit is cleared when SPI is re-enabled or by writing 1 to CRCEC bit of SPI_IFCR optionally.

0 (B_0x0): no CRC error

1 (B_0x1): CRC error detected

TI frame format error This bit is cleared by writing 1 to TIFREC bit of SPI_IFCR exclusively.

0 (B_0x0): no TI Frame Error

1 (B_0x1): TI frame error detected

mode fault When MODF is set, SPE and IOLOCK bits of SPI_CR1 register are reset and setting SPE again is blocked until MODF is cleared. This bit is cleared by writing 1 to MODFC bit of SPI_IFCR exclusively.

0 (B_0x0): no mode fault

1 (B_0x1): mode fault detected.

suspension status In Master mode, SUSP is set by hardware either as soon as the current frame is completed after CSUSP request is done or at master automatic suspend receive mode (MASRX bit is set at SPI_CR1 register) on RxFIFO full condition. SUSP generates an interrupt when EOTIE is set. This bit must be cleared prior SPI is disabled and this is done by writing 1 to SUSPC bit of SPI_IFCR exclusively.

0 (B_0x0): SPI not suspended (Master mode active or other mode).

1 (B_0x1): Master mode is suspended (current frame completed).

TxFIFO transmission complete The flag behavior depends on TSIZE setting. When TSIZE = 0, the TXC is changed by hardware exclusively and it raises each time the TxFIFO becomes empty and there is no activity on the bus. If TSIZE different from 0 there is no specific reason to monitor TXC as it just copies the EOT flag value including its software clearing. The TXC generates an interrupt when EOTIE is set. This flag is set when SPI is reset or disabled.

0 (B_0x0): current data transaction is still ongoing, data is available in TxFIFO or last frame transmission is on going.

1 (B_0x1): last TxFIFO frame transmission complete

RxFIFO packing level When RXWNE = 0 and data size is set up to 16-bit, the value gives number of remaining data frames persisting at RxFIFO. Note: (*): Possible value when data size is set up to 8-bit only. When data size is greater than 16-bit, these bits are always read as 00. In that consequence, the single data frame received at the FIFO cannot be detected neither by RWNE nor by RXPLVL bits if data size is set from 17 to 24 bits. The user must then apply other methods to detect the number of data received, such as monitor the EOT event when TSIZE > 0 or RXP events when FTHLV = 0.

0 (B_0x0): no next frame is available at RxFIFO

1 (B_0x1): 1 frame is available

2 (B_0x2): 2 frames are available*

3 (B_0x3): 3 frames are available*

RxFIFO word not empty Note: This bit value does not depend on DSIZE setting and keeps together with RXPLVL[1:0] information about RxFIFO occupancy by residual data.

0 (B_0x0): less than four bytes of RxFIFO space is occupied by data

1 (B_0x1): at least four bytes of RxFIFO space is occupied by data

number of data frames remaining in current TSIZE session The value is not quite reliable when traffic is ongoing on bus . Note: CTSIZE[15:0] bits are not available in instances with limited set of features.