stm32 /stm32h7rs /STM32H7R /TIM14 /TIM14_CCER

Capture/Compare 1 output enable.

0 (B_0x0): Capture mode disabled / tim_oc1 is not active

1 (B_0x1): Capture mode enabled / tim_oc1 signal is output on the corresponding output pin

Capture/Compare 1 output Polarity. When CC1 channel is configured as input, both CC1NP/CC1P bits select the active polarity of tim_ti1fp1 for capture operations. CC1NP=0, CC1P=0: non-inverted/rising edge. The circuit is sensitive to tim_ti1fp1 rising edge (capture or trigger operations in reset, external clock or trigger mode), TIxFP1 is not inverted (trigger operation in gated mode or encoder mode). CC1NP=0, CC1P=1: inverted/falling edge. The circuit is sensitive to tim_ti1fp1 falling edge (capture or trigger operations in reset, external clock or trigger mode), tim_ti1fp1 is inverted (trigger operation in gated mode or encoder mode). CC1NP=1, CC1P=1: non-inverted/both edges/ The circuit is sensitive to both tim_ti1fp1 rising and falling edges (capture or trigger operations in reset, external clock or trigger mode), tim_ti1fp1 not inverted (trigger operation in gated mode). This configuration must not be used in encoder mode. CC1NP=1, CC1P=0: This configuration is reserved, it must not be used.

0 (B_0x0): tim_oc1 active high (output mode) / Edge sensitivity selection (input mode, see below)

1 (B_0x1): tim_oc1 active low (output mode) / Edge sensitivity selection (input mode, see below)

Capture/Compare 1 complementary output Polarity. CC1 channel configured as output: CC1NP must be kept cleared. CC1 channel configured as input: CC1NP bit is used in conjunction with CC1P to define tim_ti1fp1 polarity (refer to CC1P description).