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stm32 /stm32h7rs /STM32H7R /TIM15 /TIM15_TISEL

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Interpret as TIM15_TISEL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TI1SEL0 (B_0x0)TI2SEL

TI2SEL=B_0x0, TI1SEL=B_0x0

Description

TIM15 input selection register

Fields

TI1SEL

selects tim_ti1_in[15:0] input … Refer to Section 68.4.2: TIM15/TIM16/TIM17 pins and internal signals for interconnects list.

0 (B_0x0): TIM15_CH1 input (tim_ti1_in0)

1 (B_0x1): tim_ti1_in1

15 (B_0xF): tim_ti1_in15
TI2SEL

selects tim_ti2_in[15:0] input … Refer to Section 68.4.2: TIM15/TIM16/TIM17 pins and internal signals for interconnects list.

0 (B_0x0): TIM15_CH2 input (tim_ti2_in0)

1 (B_0x1): tim_ti2_in1

15 (B_0xF): tim_ti2_in15

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32