stm32 /stm32h7rs /STM32H7R /TIM5 /TIM5_CR2

Capture/compare DMA selection

0 (B_0x0): CCx DMA request sent when CCx event occurs

1 (B_0x1): CCx DMA requests sent when update event occurs

MMS[0]: Master mode selection These bits are used to select the information to be sent in master mode to slave timers for synchronization (tim_trgo). The combination is as follows: When the Counter Enable signal is controlled by the trigger input, there is a delay on tim_trgo, except if the master/slave mode is selected (see the MSM bit description in TIMx_SMCR register). Others: Reserved Note: The clock of the slave timer or ADC must be enabled prior to receive events from the master timer, and must not be changed on-the-fly while triggers are received from the master timer.

0 (B_0x0): Reset - the UG bit from the TIMx_EGR register is used as trigger output (tim_trgo). If the reset is generated by the trigger input (slave mode controller configured in reset mode) then the signal on tim_trgo is delayed compared to the actual reset.

1 (B_0x1): Enable - the Counter enable signal, CNT_EN, is used as trigger output (tim_trgo). It is useful to start several timers at the same time or to control a window in which a slave timer is enabled. The Counter Enable signal is generated by a logic AND between CEN control bit and the trigger input when configured in gated mode.

2 (B_0x2): Update - The update event is selected as trigger output (tim_trgo). For instance a master timer can then be used as a prescaler for a slave timer.

3 (B_0x3): Compare Pulse - The trigger output send a positive pulse when the CC1IF flag is to be set (even if it was already high), as soon as a capture or a compare match occurred (tim_trgo).

4 (B_0x4): Compare - tim_oc1refc signal is used as trigger output (tim_trgo)

5 (B_0x5): Compare - tim_oc2refc signal is used as trigger output (tim_trgo)

6 (B_0x6): Compare - tim_oc3refc signal is used as trigger output (tim_trgo)

7 (B_0x7): Compare - tim_oc4refc signal is used as trigger output (tim_trgo)

tim_ti1 selection

0 (B_0x0): The tim_ti1_in[15:0] multiplexer output is to tim_ti1 input

1 (B_0x1): The tim_ti1_in[15:0], tim_ti2_in[15:0] and tim_ti3_in[15:0] multiplexers outputs are XORed and connected to the tim_ti1 input. See also Section 64.3.29: Interfacing with Hall sensors on page 3758.

MMS[3]