DOEN=B_0x0, DIEN=B_0x0
CRYP DMA control register
| DIEN | DMA input enable When this bit is set, DMA requests are automatically generated by the peripheral during the input data phase. 0 (B_0x0): Incoming data transfer to CRYP via DMA is disabled 1 (B_0x1): Incoming data transfer to CRYP via DMA is disabled |
| DOEN | DMA output enable When this bit is set, DMA requests are automatically generated by the peripheral during the output data phase. 0 (B_0x0): Outgoing data transfer from CRYP via DMA is disabled 1 (B_0x1): Outgoing data transfer from CRYP via DMA is enabled |