CRYP_IV0RR

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Interpret as CRYP_IV0RR

Description

CRYP initialization vector register 0R

Fields

IVI

Initialization vector bit x This bitfield stores the initialization vector bits [95:64] for AES chaining modes other than ECB. The value stored in CRYP_IVxR/LR registers is updated by hardware after each computation round (when applicable). Write to this register is ignored when CRYP is busy (BUSY bit set).

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