stm32 /stm32h7rs /STM32H7S /CRYP /CRYP_RISR

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Interpret as CRYP_RISR

OUTRIS=B_0x0, INRIS=B_0x0

Description

CRYP raw interrupt status register

Fields

INRIS	Input FIFO service raw interrupt status This read-only bit is set by hardware when an input FIFO flag (IFNF or IFEM) is set in CRYP_SR register, regardless of the INIM mask bit value in CRYP_IMSCR register. 0 (B_0x0): No input FIFO event detected 1 (B_0x1): Input FIFO empty or not full detected; an interrupt is generated if CRYPEN is set and if INIM bit is set in CRYP_IMSCR register
OUTRIS	Output FIFO service raw interrupt status This read-only bit is set by hardware when an output FIFO flag (OFFU or OFNE) is set in CRYP_SR register, regardless of the OUTIM mask bit value in CRYP_IMSCR register. 0 (B_0x0): No output FIFO event detected 1 (B_0x1): Output FIFO full or not empty detected; an interrupt is generated if OUTIM bit is set in CRYP_IMSCR register

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