stm32 /stm32h7rs /STM32H7S /CRYP /CRYP_SR

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Interpret as CRYP_SR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)IFEM 0 (B_0x0)IFNF 0 (B_0x0)OFNE 0 (B_0x0)OFFU 0 (B_0x0)BUSY 0 (B_0x0)KERF 0 (B_0x0)KEYVALID

KERF=B_0x0, KEYVALID=B_0x0, OFFU=B_0x0, OFNE=B_0x0, BUSY=B_0x0, IFNF=B_0x0, IFEM=B_0x0

Description

CRYP status register

Fields

IFEM

Input FIFO empty flag

0 (B_0x0): Input FIFO is not empty

1 (B_0x1): Input FIFO is empty

IFNF

Input FIFO not full flag

0 (B_0x0): Input FIFO is full

1 (B_0x1): Input FIFO is not full

OFNE

Output FIFO not empty flag

0 (B_0x0): Output FIFO is empty

1 (B_0x1): Output FIFO is not empty

OFFU

Output FIFO full flag

0 (B_0x0): Output FIFO is not full

1 (B_0x1): Output FIFO is full

BUSY

Busy bit This flag indicates whether CRYP is idle or busy. CRYP is flagged as idle when disabled (CRYPEN = 0) or when the AES core is not processing any data. It happens when the last processing has completed, or CRYP is waiting for enough data in the input FIFO or enough free space in the output FIFO (that is in each case at least 4 words). CRYP is flagged as busy when processing a block data, preparing a key (ECB or CBC decryption only), or transferring a shared key from SAES peripheral.

0 (B_0x0): Idle

1 (B_0x1): Busy

KERF

Key error flag This read-only bit is set by hardware when key information failed to load into key registers. KERF is triggered upon any of the following errors: CRYP_KxR/LR register write does not respect the correct order (refer to Section 60.4.16: CRYP key registers for details). CRYP fails to load the key shared by SAES peripheral (KMOD = 0x2). KERF must be cleared by the application software, otherwise KEYVALID cannot be set. It can be done through IPRST bit of CRYP_CR, or when a correct key writing sequence starts.

0 (B_0x0): No key error detected

1 (B_0x1): Key information failed to load into key registers

KEYVALID

Key valid flag This read-only bit is set by hardware when the key of size defined by KEYSIZE is loaded in CRYP_KxR/LR key registers. The CRYPEN bit can only be set when KEYVALID is set. In normal mode when KMOD[1:0] is at zero, the key must be written in the key registers in the correct sequence, otherwise the KERF flag is set and KEYVALID remains cleared. When KMOD[1:0] is different from zero, the BUSY flag is automatically set by CRYP. When the key is loaded successfully, BUSY is cleared and KEYVALID set. Upon an error, KERF is set, BUSY cleared and KEYVALID remains cleared. If set, KERF must be cleared, otherwise KEYVALID cannot be set. For further information on key loading, refer to Section 60.4.16: CRYP key registers.

0 (B_0x0): Key not valid

1 (B_0x1): Key valid

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