stm32 /stm32h7rs /STM32H7S /MCE1 /MCE_CR

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Interpret as MCE_CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GLOCK 0 (B_0x0)MKLOCK

MKLOCK=B_0x0, GLOCK=B_0x0

Description

MCE configuration register

Fields

GLOCK

Global lock Lock the configuration of most MCE registers until next reset. This bit is cleared by default and once set it cannot be reset until MCE reset.

0 (B_0x0): MCE registers are writable

1 (B_0x1): All writes to MCE registers are ignored, with the exception of MCE_IACR and MCE_IAIER registers.

MKLOCK

Master keys lock Lock the master key configurations until next reset. This bit is cleared by default and once set it cannot be reset until MCE reset. Effect of this bit depends on the number of master keys. See Section 35.3: MCE implementation for details.

0 (B_0x0): Writes to MCE_MKEYRx and MCE_FMKEYRx registers are allowed

1 (B_0x1): Writes to MCE_MKEYRx and MCE_FMKEYRx registers are ignored until next MCE reset.

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