SAESEN=B_0x0, HASHEN=B_0x0, PKAEN=B_0x0, CRYPEN=B_0x0, RNGEN=B_0x0
RCC AHB3 clock enable register
| RNGEN | RNG peripheral clocks enable Set and reset by software. 0 (B_0x0): RNG peripheral clocks disabled (default after reset) 1 (B_0x1): RNG peripheral clocks enabled. |
| HASHEN | HASH peripheral clock enable Set and reset by software. 0 (B_0x0): HASH peripheral clock disabled (default after reset) 1 (B_0x1): HASH peripheral clock enabled |
| CRYPEN | CRYP peripheral clock enable Set and reset by software. 0 (B_0x0): CRYP peripheral clock disabled (default after reset) 1 (B_0x1): CRYP peripheral clock enabled |
| SAESEN | SAES peripheral clock enable Set and reset by software. This bit controls the enable of the clock delivered to the SAES. 0 (B_0x0): The SAES peripheral clocks are disabled (default after reset) 1 (B_0x1): The SAES peripheral clocks are enabled |
| PKAEN | PKA peripheral clock enable Set and reset by software. 0 (B_0x0): PKA peripheral clock disabled (default after reset) 1 (B_0x1): PKA peripheral clock enabled |